I love the hard drive sound emulation! I find that modern restorations of vintage hardware using SD cards to emulate drives are missing an important part of the nostalgic experience when they just start up completely silently.
The floppy disk usually made this straight up honking noise . I had a V20, but at 10Mhz. Never had a problem, except for formatting floppies. The V20 has a few tricks up it's sleeve, with a few less clock cycles on some instructions, and a Z80 mode to run cpm.
But,the real trick was to put real IBM roms in a clone board and run Xenix. When the clone roms are back in it still booted. Helped a lot to have a 2:1 Rll controller. Xenix was just pollute and delute - system V with some BSD thrown in and a slightly altered portable C complier that was later admitted to be wrong endian.
Did this Board have a FPU socket? Made turbo pascal run much faster. ( The 8087 version we got from the physics lab...) Especially the Hilbert matrix. And FFTs.
The title is a bit misleading; it's running on an 8088-compatible CPU, and a 1 megabyte SRAM, with the FPGA containing the display adapter and drive controller, as well as the glue logic.
A bit misleading, albeit in an impressive way. I nearly skipped the article thinking that it would be an all FPGA solution. Instead, they interfaced somewhat period correct chips: the V20 was used in XT compatibles of the era, the DAC was authentic (even if it is only a small part of the sound card), and the 1 MB RAM chip is the sort of cost cutting measure they would have used back in the day if it was available (though it would likely have been DRAM rather than SRAM). The rest being on an FPGA is certainly understandable since it was listed as an FPGA based project!
This build demonstrate what’s actually interesting about FPGA to me. A pure implementation might as well be a software emulator. Being able to interface real chips makes this really neat.
A bit offtopic for this article , but I'm waiting for some FPGA's based "..device PC emulator?..." that can connect to my old hard drives from the mid 80s ... and boot them ....
What was the most surprising timing constraint you had to meet for the V20 bus controller? The 8088's multiclock cycles were always under specified in original datasheets and I'm curious what reality looked like.
The bus controller was fairly straight forward. I found the timing diagrams in the V20 datasheet to be pretty easy to follow. The clock for the CPU is generated by the FPGA which I derived from a clock running at twice the speed, that made it easy to pick which clock edges I wanted to sample from or assert data for the CPU on. I did have a bug or two in there early on which meant that memory writes would not store the data I was expecting as I sampled the data bus at the wrong time. That was a tricky one as the bug would only become visible when that location was loaded from again. The CPU i'm using is rated for 16Mhz, but i've only tried to push it up to 10Mhz so far so I have a bit of margin. Some more issues might pop up if I push the speed higher I suspect. Its very stable as it is now and i've not seen any issues I could attribute to the bus handling.
Thats an oversight on my part, I should put a license on it. I would love for anyone to be able to build one or tinker with the code as they want to. After all I was only able to make this because others shared their projects that I could learn from.
I love the hard drive sound emulation! I find that modern restorations of vintage hardware using SD cards to emulate drives are missing an important part of the nostalgic experience when they just start up completely silently.
I was about the comment the same. It adds a lot of authenticity to the whole game loading process!
The floppy disk usually made this straight up honking noise . I had a V20, but at 10Mhz. Never had a problem, except for formatting floppies. The V20 has a few tricks up it's sleeve, with a few less clock cycles on some instructions, and a Z80 mode to run cpm.
But,the real trick was to put real IBM roms in a clone board and run Xenix. When the clone roms are back in it still booted. Helped a lot to have a 2:1 Rll controller. Xenix was just pollute and delute - system V with some BSD thrown in and a slightly altered portable C complier that was later admitted to be wrong endian.
Did this Board have a FPU socket? Made turbo pascal run much faster. ( The 8087 version we got from the physics lab...) Especially the Hilbert matrix. And FFTs.
Why original IBM BIOS was requried for Xenix?!
The title is a bit misleading; it's running on an 8088-compatible CPU, and a 1 megabyte SRAM, with the FPGA containing the display adapter and drive controller, as well as the glue logic.
A bit misleading, albeit in an impressive way. I nearly skipped the article thinking that it would be an all FPGA solution. Instead, they interfaced somewhat period correct chips: the V20 was used in XT compatibles of the era, the DAC was authentic (even if it is only a small part of the sound card), and the 1 MB RAM chip is the sort of cost cutting measure they would have used back in the day if it was available (though it would likely have been DRAM rather than SRAM). The rest being on an FPGA is certainly understandable since it was listed as an FPGA based project!
And the FPGA is a modern day equivalent to an ULA. If they could have put all of the chips in a single programmable one, they would.
This build demonstrate what’s actually interesting about FPGA to me. A pure implementation might as well be a software emulator. Being able to interface real chips makes this really neat.
A bit offtopic for this article , but I'm waiting for some FPGA's based "..device PC emulator?..." that can connect to my old hard drives from the mid 80s ... and boot them ....
What was the most surprising timing constraint you had to meet for the V20 bus controller? The 8088's multiclock cycles were always under specified in original datasheets and I'm curious what reality looked like.
The bus controller was fairly straight forward. I found the timing diagrams in the V20 datasheet to be pretty easy to follow. The clock for the CPU is generated by the FPGA which I derived from a clock running at twice the speed, that made it easy to pick which clock edges I wanted to sample from or assert data for the CPU on. I did have a bug or two in there early on which meant that memory writes would not store the data I was expecting as I sampled the data bus at the wrong time. That was a tricky one as the bug would only become visible when that location was loaded from again. The CPU i'm using is rated for 16Mhz, but i've only tried to push it up to 10Mhz so far so I have a bit of margin. Some more issues might pop up if I push the speed higher I suspect. Its very stable as it is now and i've not seen any issues I could attribute to the bus handling.
Dupe. Posted few days ago by author: https://news.ycombinator.com/item?id=45903083.
Well, we have a dos clone and FFTs I. The news... Can this run the DOS clone and do FFTs?
Wow. A lot of memories unlocked instantly. My first PC in 1995 was a very old IBM PC XT.
Same. I had a used Amstrad PC 1640, which had V20 @ 8Mhz and EGA graphics. The author's desire really hit home here.
correction: it had v30, which was 8086 rather than 8088 clone (16bit bus)
Yeah I had a little Carry-I PC XT clone with CGA/Hercules graphics, V20 8088 and an amber screen that I really regret selling.
I guess it couldn’t really do that much at the time compared to Amigas, STs and Acorns but there was something magic about my experiences with the PC.
Looks nice, but there's no license. Can't do a thing with this.
Thats an oversight on my part, I should put a license on it. I would love for anyone to be able to build one or tinker with the code as they want to. After all I was only able to make this because others shared their projects that I could learn from.
Marvel and enjoy.
Jesus christ, must everything be transactional?