The official replies are addressing questions that nobody has asked. The main issue is why Linux support is being removed from the Basic tier while Windows is still allowed.
To grow the ecosystem, AMD needs more people working on their hardware. Restricting Linux will only alienates students, hobbyists, and devs who want to adopt AMD tech.
I’ve spent several hundred thousand on Xilinx FPGAs yet they nickel and dime me for licenses. It’s not the cost that’s a problem—-it’s the hassle of making a PO for a license to set up new computers, set up CI, hiring new teammates, setting up for interns/students. Xilinx has continued to go downhill since their acquisition by AMD.. it used to feel like it was run by engineers who understood their customers, now it seems to be getting taken over by the MBA crowd who only understands pinching pennies and chiseling their own loyal customers
It's really unfortunate that FPGA development is still stuck in the 90s. The incentives between IP owners and hobbyists are so misaligned that I don't see the possibility of this ever improving.
The market is full of dark patterns, and vendors like AMD/Xilinx can pull shitty moves like what OP highlighted, knowing there is no decent alternative (Altera is another disaster). Lattice had the opportunity to fully embrace opensource toolchain and try to disrupt from the bottom, but they seem stuck in the middle, not wanting to commit one way or another.
I'm grateful to SymbiFlow, and IceStorm and others, even though they obviously lack support for proprietary hardware features.
The difficult part is the place and route algorithm, not the bitstream. The proprietary ones already take quite a long time to solve: I regularly have 12-24h runs. Perhaps an open source one could do better? But it's not quite as straightforward as reverse engineering a proprietary bitstream.
When I first started doing chip design my boss paid more for tools per year than he paid me ... now days open source tool chains are leaping ahead ... I don't need a boss (or VCs) in order to design chips
As someone actively working on nextpnr support for a fairly new FPGA architecture, it really is amazing that we have something like that in the open source world.
YosysHQ are one of my favorite companies to exist.
The official replies are addressing questions that nobody has asked. The main issue is why Linux support is being removed from the Basic tier while Windows is still allowed.
To grow the ecosystem, AMD needs more people working on their hardware. Restricting Linux will only alienates students, hobbyists, and devs who want to adopt AMD tech.
- From long term AMD user
I’ve spent several hundred thousand on Xilinx FPGAs yet they nickel and dime me for licenses. It’s not the cost that’s a problem—-it’s the hassle of making a PO for a license to set up new computers, set up CI, hiring new teammates, setting up for interns/students. Xilinx has continued to go downhill since their acquisition by AMD.. it used to feel like it was run by engineers who understood their customers, now it seems to be getting taken over by the MBA crowd who only understands pinching pennies and chiseling their own loyal customers
I’m working in education and will change to other vendors in the near future. That means all my students will do so as well.
Windows cannot provide feature parity for workloads that require cross compiling, AMD could at least support RHEL like the old days.
Link to AMDs description of the new pricing being criticized: https://www.amd.com/en/products/software/adaptive-socs-and-f...
I love the way they buried the “we are no longer supporting an entire operating system” in a small missing tick, half way down the page…
Good news for FOSS FPGA toolchains, I suppose. Eg https://f4pga.org/ for some kind of umbrella project.
It's really unfortunate that FPGA development is still stuck in the 90s. The incentives between IP owners and hobbyists are so misaligned that I don't see the possibility of this ever improving.
The market is full of dark patterns, and vendors like AMD/Xilinx can pull shitty moves like what OP highlighted, knowing there is no decent alternative (Altera is another disaster). Lattice had the opportunity to fully embrace opensource toolchain and try to disrupt from the bottom, but they seem stuck in the middle, not wanting to commit one way or another.
I'm grateful to SymbiFlow, and IceStorm and others, even though they obviously lack support for proprietary hardware features.
Well Gowin here I come I guess
I wonder how good LLM agents are at reverse engineering FPGA bitstreams...
I want a robust open-source ecosystem where anyone can take my hardware projects and modify them without needing to deal with licensing friction.
The difficult part is the place and route algorithm, not the bitstream. The proprietary ones already take quite a long time to solve: I regularly have 12-24h runs. Perhaps an open source one could do better? But it's not quite as straightforward as reverse engineering a proprietary bitstream.
When I first started doing chip design my boss paid more for tools per year than he paid me ... now days open source tool chains are leaping ahead ... I don't need a boss (or VCs) in order to design chips
That's why nextpnr exists :)
https://github.com/YosysHQ/nextpnr
As someone actively working on nextpnr support for a fairly new FPGA architecture, it really is amazing that we have something like that in the open source world.
YosysHQ are one of my favorite companies to exist.